View PT7C4337_1072786.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Product Features
* * * Using external 32.768kHz quartz crystal Supports I2C-Bus's high speed mode (400 kHz) Includes time (Hour/Minute/Second) and calendar (Year/Month/Date/Day) counter functions (BCD code) * * * * Programmable square wave output signal Two Time-of-Day Alarms Oscillator Stop Flag Operating range: 1.8V to 5.5V
Product Description
The PT7C4337 serial real-time clock is a low-power clock/calendar with two programmable time-of-day alarms and a programmable square-wave output. Address and data are transferred serially via a 2-wire, bidirectional bus. The clock/calendar provides seconds, minutes, hours, day, date, month, and year information. The date at the end of the month is automatically adjusted for months with fewer than 31 days, including corrections for leap year. The clock operates in either the 24-hour or 12-hour format with AM/PM indicator.
Ordering Information
Part Number PT7C4337PE PT7C4337WE PT7C4337UE Package Lead free 8-Pin DIP Lead free 8-Pin SOIC Lead free 8-Pin MSOP Table 1 shows the basic functions of PT7C4337. More details are shown in section: overview of functions.
Table 1. Basic functions of PT7C4337 Item Source 1 Oscillator Function Crystal: 32.768kHz External input PT7C4337 2 1, 4.096k, 8.192k, 32.768k
Oscillator enable/disable Oscillator fail detect 12-hour 24-hour
2
Time
Time display Century bit
3 4
Alarm interrupt Programmable square wave output (Hz)
PT0205(02/07) 1
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Contents
Product Features ............................................................................................................................................................................... 1 Product Description .......................................................................................................................................................................... 1 Pin Assignment.................................................................................................................................................................................. 3 Pin Description .................................................................................................................................................................................. 3 Function Block .................................................................................................................................................................................. 4 Recommended Layout for Crystal .................................................................................................................................................. 4 Crystal Specifications ....................................................................................................................................................................... 4 Function Description......................................................................................................................................................................... 5 Overview of Functions .................................................................................................................................................................. 5 Registers......................................................................................................................................................................................... 6 Control and status register........................................................................................................................................................... 7 Oscillator related bits .............................................................................................................................................................. 7 Square wave frequency selection bits ..................................................................................................................................... 7 Interrupt related bits ................................................................................................................................................................ 8 Time Counter .............................................................................................................................................................................. 9 Days of the week Counter ......................................................................................................................................................... 10 Calendar Counter ...................................................................................................................................................................... 10 Alarm Register .......................................................................................................................................................................... 11 Alarm Function ........................................................................................................................................................................... 12 I C Bus Interface............................................................................................................................................................................. 14
2
Overview of I2C-BUS .................................................................................................................................................................. 14 System Configuration ................................................................................................................................................................. 14 Starting and Stopping I2C Bus Communications ..................................................................................................................... 15 Slave Address .............................................................................................................................................................................. 17 Maximum Ratings........................................................................................................................................................................... 19 Recommended Operating Conditions ........................................................................................................................................... 19 DC Electrical Characteristics......................................................................................................................................................... 20 AC Electrical Characteristics......................................................................................................................................................... 21 Mechanical Information ................................................................................................................................................................. 22
PT0205(02/07) 2
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Pin Assignment
PT7C4337
1
X1 X2 INTA GND
VCC
8
2
SQW/INTB 7 SCL SDA
6
3
4
5
Pin Description
Pin no. 1 2 6 5 3 7 8 4 Pin X1 X2 SCL SDA INTA SQW/INTB VCC GND Type I O I I/O O O P P Description Oscillator Circuit Input. Together with X2, 32.768kHz crystal is connected between them. Or external clock input. Oscillator Circuit Output. Together with X1, 32.768kHz crystal is connected between them. When 32.768kHz external input, X2 must be float. Serial Clock Input. SCL is used to synchronize data movement on the I2C serial interface. Serial Data Input/Output. SDA is the input/output pin for the 2-wire serial interface. The SDA pin is open-drain output and requires an external pull-up resistor. Interrupt Output. When enabled, INTA is asserted low when the time matches the values set in the alarm registers. This pin is an open-drain output and requires an external pull up resistor. Square-Wave/Interrupt Output. Programmable square-wave or interrupt output signal. It is an open-drain output and requires an external pull up resistor. Power. Ground.
PT0205(02/07) 3
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Function Block
Comparator 1
Alarm 1 Register
(Sec, Min, Hour, Day/Date)
PT7C4337
Comparator 2 X1
32.768 kHz
CD
Alarm 2 Register
(Min, Hour, Day/Date)
OSC
Counter Chain
Time Counter
(Sec,Min,Hour,Day,Date,Month,Year)
X2
CG
Control Register
Address Decoder
Address Register I /O Interface (I2C) Shift Register
SCL
INTA SQW/INTB
Interrupt Control Square Wave Output Control
SDA
Recommended Layout for Crystal
PT7C4337
Local Ground plane Layer 2 Guard Ring (connect to gound)
Crystal Specifications
Parameter Nominal Frequency Series Resistance Load Capacitance Symbol fO ESR CL Min Typ 32.768 12.5 Max 45 Unit kHz k pF
The crystal, traces and crystal input pins should be isolated from RF generating signals.
PT0205(02/07) 4
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Function Description
Overview of Functions
Clock function CPU can read or write data including the year (last two digits), month, date, day, hour, minute, and second. Any (two-digit) year that is a multiple of 4 is treated as a leap year and calculated automatically as such until the year 2100.
Alarm function This device has two alarm system (Alarm 1 and Alarm 2) that outputs interrupt signals from INTA or INTB to CPU when the date, day of the week, hour, minute or second correspond to the setting. Each of them may output interrupt signal separately at a specified time. The alarm is be selectable between on and off for matching alarm or repeating alarm.
Programmable square wave output A square wave output enable bit controls square wave output at pin 7. Frequencies are selectable: 1, 4.096k, 8.192k, 32.768k Hz.
Interface with CPU Data is read and written via the I2C bus interface using two signal lines: SCL (clock) and SDA (data). Since the output of the I/O pin SDA is open drain, a pull-up resistor should be used on the circuit board if the CPU output I/O is also open drain. The SCL's maximum clock frequency is 400 kHz, which supports the I2C bus's high-speed mode.
Oscillator fail detect When oscillator fail, PT7C4337 OSF bit will be set.
Oscillator enable/disable Oscillator and time count chain can be enabled or disabled at the same time by /ETIME bit.
PT0205(02/07) 5
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Registers
Allocation of registers Addr. (hex)*1 00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F Function Seconds (00-59) Minutes (00-59) Hours (00-23 / 01-12) Days of the week (01-07) Dates (01-31) Months (01-12) Years (00-99) Alarm 1: Seconds Alarm 1: Minutes Alarm 1: Hours Alarm 1: Day, Date Alarm 2: Minutes Alarm 2: Hours Alarm 2: Day, Date Control Status Register definition Bit 7 0 0 0 0 0 Century Y80 A1M1*2 A1M2*2 A1M3*2 A1M4*2 A2M2*3 A2M3*3 A2M4*3 /ETIME*4 OSF*9 Bit 6 S40 M40 12, /24 0 0 0 Y40 S40 M40 12, /24 Day, /Date M40 12, /24 Day, /Date 0 0 Bit 5 S20 M20 H20 or P, /A 0 D20 0 Y20 S20 M20 H20 or P, /A 0, D20 M20 H20 or P, /A 0, D20 0 0 Bit 4 S10 M10 H10 0 D10 MO10 Y10 S10 M10 H10 0, D10 M10 H10 0, D10 RS2*5 0 Bit 3 S8 M8 H8 0 D8 MO8 Y8 S8 M8 H8 0, D8 M8 H8 0, D8 RS1*5 0 Bit 2 S4 M4 H4 W4 D4 MO4 Y4 S4 M4 H4 W4, D4 M4 H4 W4, D4 INTCN*6 0 Bit 1 S2 M2 H2 W2 D2 MO2 Y2 S2 M2 H2 W2, D2 M2 H2 W2, D2 A2IE*7 A2F*8 Bit 0 S1 M1 H1 W1 D1 MO1 Y1 S1 M1 H1 W1, D1 M1 H1 W1, D1 A1IE*7 A1F*8
Caution points: *1. PT7C4337 uses 8 bits for address. For excess 0FH address, PT7C4337 will not respond (no acknowledge signal was given). *2. Alarm 1 mask bits. Select alarm repeated rate when an alarm occurs. *3. Alarm 2 mask bits. Select alarm repeated rate when an alarm occurs. *4. Oscillator and time count chain enable/disable bit. *5. Square wave output frequency select. *6. Interrupt output pin select bit. *7. Alarm 1 and alarm 2 enable bits. *8. Alarm 1 and alarm 2 flag bits. *9. Oscillator stop flag. *10. All bits marked with "0" are read-only bits. Their value when read is always "0".
PT0205(02/07) 6
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Control and status register
Addr. (hex) 0E 0F Description Control (default) Status (default) D7 /ETIME 0 OSF 1 D6 0 0 0 0 D5 0 0 0 0 D4 RS2 1 0 0 D3 RS1 1 0 0 D2 INTCN 0 0 0 D1 A2IE 0 D0 A1IE 0
A2F A1F Undefined Undefined
Oscillator related bits
*
/ETIME Enable oscillator and time count chain bit. /ETIME Read / Write Data 0 1 Enable oscillator and time count chain. Disable oscillator and time count chain. Description
Default
OSF Oscillator Stop Flag. A logic 1 in this bit indicates that the oscillator either is stopped or was stopped for some period of time and may be used to judge the validity of the clock and calendar data. This bit is set to logic 1 anytime that the oscillator stops. The following are examples of conditions that can cause the OSF bit to be set: 1) The first time power is applied. 2) The voltage present on VCC is insufficient to support oscillation. 3) The /ETIME bit is turned off. 4) External influences on the crystal (e.g., noise, leakage, etc.). This bit remains at logic 1 until written to logic 0. Square wave frequency selection bits
*
*
RS2, RS1 Square wave Rate Select. These bits control the frequency of the square-wave output when the square wave has been enabled. RS2, RS1 Data 00 Read / Write 01 10 11 1 4.096k 8.192k 32.768k
Default
SQW output freq. (Hz)
PT0205(02/07) 7
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Interrupt related bits
*
INTCN Interrupt Output pin select bit. This bit controls the relationship between the two alarms and the interrupt output pins. INTCN Data Description 1 Read / Write 0 A match between the timekeeping registers and the alarm 1 registers activates the INTA pin (if the alarm 1 is enabled) and a match between the timekeeping registers and the alarm 2 registers activates the SQW/INTB pin (if the alarm 2 is enabled). A match between the timekeeping registers and either alarm 1 or alarm 2 registers activates the INTA pin (if the alarms are enabled). In this configuration, a square wave is output on the SQW/INTB pin.
Default
*
A1IE Alarm 1 Interrupt Enable. A1IE Data Read / Write 0 1
Description The A1F bit does not initiate the INTA signal. Permits the alarm 1 flag (A1F) bit in the status register to assert INTA.
Default
*
A1F Alarm 1 Flag. A1F Read / Write Read
Data 0 1 The time do not match the alarm 1 registers.
Description
Default
Indicates that the time matched the alarm 1 registers. If the A1IE bit is also logic 1, the INTA pin goes low. A1F is cleared when written to logic 0. Attempting to write to logic 1 leaves the value unchanged.
*
A2IE Alarm 2 Interrupt Enable. A2IE Data Read / Write 0 1
Description The A2F bit does not initiate an interrupt signal.
Default
Permits the alarm 2 flag (A2F) bit in the status register to assert INTA (when INTCN = 0) or to assert SQW/INTB (when INTCN = 1).
*
A2F Alarm 2 Flag. A1F Read / Write
Data 0 The time do not match the alarm 2 registers.
Description
Default
Read
1
Indicates that the time matched the alarm 1 registers. This flag can be used to generate an interrupt on either INTA or SQW/INTB depending on the status of the INTCN bit. If the INTCN = 0 and A2F = 1 (and A2IE = 1), the INTA pin goes low. If the INTCN = 1 and A2F = 1 (and A2IE = 1), the SQW/INTB pin goes low. A2F is cleared when written to logic 0. Attempting to write to logic 1 leaves the value unchanged.
PT0205(02/07) 8
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Time Counter
Time digit display (in BCD code): * Second digits: Range from 00 to 59 and carried to minute digits when incremented from 59 to 00. * Minute digits: Range from 00 to 59 and carried to hour digits when incremented from 59 to 00. * Hour digits: See description on the /12, 24 bit. Carried to day and day-of-the-week digits when incremented from 11 p.m. to 12 a.m. or 23 to 00. Addr. (hex) 00 01 02 Description Seconds (default) Minutes (default) Hours (default) D7 0 0 0 0 0 0 D6 D5 D4 D3 D2 D1 D0
S40 S20 S10 S8 S4 S2 S1 Undefined Undefined Undefined Undefined Undefined Undefined Undefined M40 M20 M10 M8 M4 M2 M1 Undefined Undefined Undefined Undefined Undefined Undefined Undefined 12, /24 H20 or P,/A H10 H8 H4 H2 H1 Undefined Undefined Undefined Undefined Undefined Undefined Undefined
Note: Any registered imaginary time should be replaced with correct time, otherwise it will cause the clock counter malfunction.
*
12, /24 bit This bit is used to select between 12-hour clock system and 24-hour clock system. 12, /24 Read / Write Data 0 1 24-hour system 12-hour system Description
This bit is used to select between 12-hour clock operation and 24-hour clock operation. 12, /24 Description Hours register 24-hour clock 00 01 02 03 04 05 06 07 08 09 10 11 12-hour clock 52 ( AM 12 ) 41 ( AM 01 ) 42 ( AM 02 ) 43 ( AM 03 ) 44 ( AM 04 ) 45 ( AM 05 ) 46 ( AM 06 ) 47 ( AM 07 ) 48 ( AM 08 ) 49 ( AM 09 ) 50 ( AM 10 ) 51 ( AM 11 ) 24-hour clock 12 13 14 15 16 17 18 19 20 21 22 23 12-hour clock 72 ( PM 12) 61 ( PM 01 ) 62 ( PM 02 ) 63 ( PM 03 ) 64 ( PM 04 ) 65 ( PM 05 ) 66 ( PM 06 ) 67 ( PM 07 ) 68 ( PM 08 ) 69 ( PM 09 ) 70 ( PM 10 ) 71 ( PM 11 )
0
24-hour time display
1
12-hour time display
* Be sure to select between 12-hour and 24-hour clock operation before writing the time data.
PT0205(02/07) 9
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Days of the week Counter
The day counter is a divide-by-7 counter that counts from 01 to 07 and up 07 before starting again from 01. Values that correspond to the day of week are user defined but must be sequential (i.e., if 1 equals Sunday, then 2 equals Monday, and so on). Illogical time and date entries result in undefined operation. Addr. Description D7 D6 D5 D4 D3 D2 D1 D0 (hex) 03 Days of the week (default) 0 0 0 0 0 0 0 0 0 0 W4 W2 W1 Undefined Undefined Undefined
Calendar Counter
The data format is BCD format. * Day digits: Range from 1 to 31 (for January, March, May, July, August, October and December). Range from 1 to 30 (for April, June, September and November). Range from 1 to 29 (for February in leap years). Range from 1 to 28 (for February in ordinary years). Carried to month digits when cycled to 1. * Month digits: Range from 1 to 12 and carried to year digits when cycled to 1. * Year digits: Range from 00 to 99 and 00, 04, 08, ... , 92 and 96 are counted as leap years. Addr. (hex) 04 05 06 Description Dates (default) Months (default) Years (default) D7 0 0 Century*1 Undefined D6 0 0 0 0 D5 D4 D3 D2 D1 D0
D20 D10 D8 D4 D2 D1 Undefined Undefined Undefined Undefined Undefined Undefined 0 0 M10 M8 M4 M2 M1 Undefined Undefined Undefined Undefined Undefined
Y80 Y40 Y20 Y10 Y8 Y4 Y2 Y1 Undefined Undefined Undefined Undefined Undefined Undefined Undefined Undefined
*1: The century bit is toggled when the years register overflows from 99 to 00.
PT0205(02/07) 10
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Alarm Register
*
Alarm 1, Alarm 2 Register Addr. 07 08 09 Description Alarm 1: Seconds (default) Alarm 1: Minutes (default) Alarm 1: Hours (default) D7 D6 D5 S20 Undefined M20 Undefined D4 D3 D2 D1 D0
A1M1*1 S40 Undefined Undefined A1M2*1
*1
S10 S8 S4 S2 S1 Undefined Undefined Undefined Undefined Undefined M10 M8 M4 M2 M1 Undefined Undefined Undefined Undefined Undefined H10 H8 H4 H2 H1 Undefined Undefined Undefined Undefined Undefined 0, 0, W4, W2, W1, D10 D8 D4 D2 D1 Undefined Undefined Undefined Undefined Undefined M10 M8 M4 M2 M1 Undefined Undefined Undefined Undefined Undefined H10 H8 H4 H2 H1 Undefined Undefined Undefined Undefined Undefined 0, 0, W4, W2, W1, D10 D8 D4 D2 D1 Undefined Undefined Undefined Undefined Undefined
M40
Undefined Undefined
0A
A1M3 12, /24 H20 or P,/A Undefined Undefined Undefined 0, Day, Alarm 1: Day, Date A1M4*1 D20 /Date*1 (default) Undefined Undefined Undefined Alarm 2: Minutes (default) Alarm 2: Hours (default) A2M2*2
*2
0B 0C
M40
M20 Undefined
Undefined Undefined
0D
A2M3 12, /24 H20 or P,/A Undefined Undefined Undefined Day, 0, Alarm 2: Day, Date A2M4*2 /Date*2 D20 (default) Undefined Undefined Undefined
*1 Note: Alarm mask bit, using to select Alarm 1 alarm rate. *2 Note: Alarm mask bit, using to select Alarm 2 alarm rate.
PT0205(02/07) 11
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Alarm Function
Related register Addr. (hex) 00 01 02 03 04 07 08 09 0A 0B 0C 0D 0E 0F Seconds Minutes Hours Days of the week Dates Alarm 1: Seconds Alarm 1: Minutes Alarm 1: Hours Alarm 1: Day, Date Alarm 2: Minutes Alarm 2: Hours Alarm 2: Day, Date Control Status Function Bit 7 0 0 0 0 0 A1M1 A1M2 A1M3 A1M4 A2M2 A2M3 A2M4 /ETIME OSF Bit 6 S40 M40 12, /24 0 0 S40 M40 12, /24 Day, /Date M40 12, /24 Day, /Date 0 0 Bit 5 S20 M20 H20 or A, /P 0 D20 S20 M20 H20 or A, /P 0, D20 M20 H20 or A, /P 0, D20 0 0 Register definition Bit 4 Bit 3 S10 M10 H10 0 D10 S10 M10 H10 0, D10 M10 H10 0, D10 RS2 0 S8 M8 H8 0 D8 S8 M8 H8 0, D8 M8 H8 0, D8 RS1 0 Bit 2 S4 M4 H4 W4 D4 S4 M4 H4 W4, D4 M4 H4 W4, D4 INTCN 0 Bit 1 S2 M2 H2 W2 D2 S2 M2 H2 W2, D2 M2 H2 W2, D2 A2IE A2F Bit 0 S1 M1 H1 W1 D1 S1 M1 H1 W1, D1 M1 H1 W1, D1 A1IE A1F
Note: Alarm function does not support different hour system adopted in time and alarm register. The PT7C4337 contains two time-of-day/date alarms. The alarms can be programmed (by the INTCN bit of the control register) to operate in two different modes - each alarm can drive its own separate interrupt output or both alarms can drive a common interrupt output. Bit 7 of each of the time-of-day/date alarm registers are mask bits. When all of the mask bits for each alarm are logic 0, an alarm only occurs when the values in the timekeeping registers 00h ~ 04h match the values stored in the time-of-day/date alarm registers. The alarms can also be programmed to repeat every second, minute, hour, day, or date. Table 2 and Table 3 shows the possible settings. The Day, /Date bits (bit 6 of the alarm day/date registers) control whether the alarm value stored in bits 0 ~ 5 of that register reflects the day of the week or the date of the month. If the bit is written to logic 0, the alarm is the result of a match with date of the month. If the bit is written to logic 1, the alarm is the result of a match with day of the week. When the PT7C4337 register values match alarm register settings, the corresponding alarm flag (A1F or A2F) bit is set to logic 1. If the corresponding alarm interrupt enable (A1IE or A2IE) is also set to logic 1, the alarm condition activates one of the interrupt output (INTA or SQW/INTB) signals. The match is tested on the once-per-second update of the time and date registers.
PT0205(02/07) 12
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Table 1. Alarm 1 Mask Bits Day, /Date x x x x 0 1 Alarm 1 register mask bits A1M4 A1M3 A1M2 A1M1 1 1 1 1 0 0 1 1 1 0 0 0 Others Table 2. Alarm 2 Mask Bits Day, /Date x x x 0 1 Alarm 2 register mask bits A2M4 A2M3 A2M2 1 1 1 0 0 Others 1 1 0 0 0 1 0 0 0 0 Alarm when minutes match Alarm when hours, minutes, and seconds match Alarm when date, hours, and minutes match Alarm when day, hours, and minutes match Ignored. Alarm rate Alarm once per minute (00 seconds of every minute) 1 1 0 0 0 0 1 0 0 0 0 0 Alarm once per second Alarm when seconds match Alarm when minutes and seconds match Alarm when hours, minutes, and seconds match Alarm when date, hours, minutes, and seconds match Alarm when day, hours, minutes, and seconds match Ignored. Alarm rate
PT0205(02/07) 13
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
I2C Bus Interface
Overview of I2C-BUS
The I2C bus supports bi-directional communications via two signal lines: the SDA (data) line and SCL (clock) line. A combination of these two signals is used to transmit and receive communication start/stop signals, data signals, acknowledge signals, and so on. Both the SCL and SDA signals are held at high level whenever communications are not being performed. The starting and stopping of communications is controlled at the rising edge or falling edge of SDA while SCL is at high level. During data transfers, data changes that occur on the SDA line are performed while the SCL line is at low level, and on the receiving side the data is captured while the SCL line is at high level. In either case, the data is transferred via the SCL line at a rate of one bit per clock pulse. The I2C bus device does not include a chip select pin such as is found in ordinary logic devices. Instead of using a chip select pin, slave addresses are allocated to each device and the receiving device responds to communications only when its slave address matches the slave address in the received data.
System Configuration
All ports connected to the I2C bus must be either open drain or open collector ports in order to enable AND connections to multiple devices. SCL and SDA are both connected to the VDD line via a pull-up resistance. Consequently, SCL and SDA are both held at high level when the bus is released (when communication is not being performed). Fig 1. System configuration
Vcc RP RP
SDA SCL
Master MCU
Slave RTC
Other Peripheral Device
Note: When there is only one master, the MCU is ready for driving SCL to "H" and R P of SCL may not required.
PT0205(02/07) 14
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Starting and Stopping I2C Bus Communications
Fig 2. Starting and stopping on I2C bus
1) START condition, repeated START condition, and STOP condition a) START condition SDA level changes from high to low while SCL is at high level b) STOP condition SDA level changes from low to high while SCL is at high level c) Repeated START condition (RESTART condition) In some cases, the START condition occurs between a previous START condition and the next STOP condition, in which case the second START condition is distinguished as a RESTART condition. Since the required status is the same as for the START condition, the SDA level changes from high to low while SCL is at high level. 2) Data Transfers and Acknowledge Responses during I2C-BUS Communication a) Data transfers Data transfers are performed in 8-bit (1 byte) units once the START condition has occurred. There is no limit on the amount (bytes) of data that are transferred between the START condition and STOP condition. The address auto increment function operates during both write and read operations. Updating of data on the transmitter (transmitting side)'s SDA line is performed while the SCL line is at low level. The receiver (receiving side) captures data while the SCL line is at high level.
*Note with caution that if the SDA data is changed while the SCL line is at high level, it will be treated as a START, RESTART, or STOP condition.
PT0205(02/07) 15
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
b) Data acknowledge response (ACK signal) When transferring data, the receiver generates a confirmation response (ACK signal, low active) each time an 8-bit data segment is received. If there is no ACK signal from the receiver, it indicates that normal communication has not been established. (This does not include instances where the master device intentionally does not generate an ACK signal.) Immediately after the falling edge of the clock pulse corresponding to the 8th bit of data on the SCL line, the transmitter releases the SDA line and the receiver sets the SDA line to low (= acknowledge) level.
SCL from Master
1
2
8
9
SDA from transmitter (sending side)
Release SDA Low active ACK signal
SDA from receiver (receiving side)
After transmitting the ACK signal, if the Master remains the receiver for transfer of the next byte, the SDA is released at the falling edge of the clock corresponding to the 9th bit of data on the SCL line. Data transfer resumes when the Master becomes the transmitter. When the Master is the receiver, if the Master does not send an ACK signal in response to the last byte sent from the slave, that indicates to the transmitter that data transfer has ended. At that point, the transmitter continues to release the SDA and awaits a STOP condition from the Master.
PT0205(02/07) 16
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Slave Address
The I2C bus device does not include a chip select pin such as is found in ordinary logic devices. Instead of using a chip select pin, slave addresses are allocated to each device. All communications begin with transmitting the [START condition] + [slave address (+ R/W specification)]. The receiving device responds to this communication only when the specified slave address it has received matches its own slave address. Slave addresses have a fixed length of 7 bits. See table for the details. An R/W bit is added to each 7-bit slave address during 8-bit transfers. Table Slave address R / W bit Operation Transfer data bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 Read D1 h 1 (= Read) 1 1 0 1 0 0 0 Write D0 h 0 (= Write)
I2C Bus's Basic Transfer Format
S
Start indication
P
Stop indication
A
RTC Acknowledge
Sr
Restart indication
A
Master Acknowledge
1) Write via I2C bus
S 1
Start
Slave address (7 bits) 1 0 1 0 0 0
write
A
Addr. setting
A
bit
bit
bit
bit
bit
bit
bit
bit
0
A C K
7
6
5
4
3
2
1
0
A
P
Slave address + write specification
Address Specifies the write start address.
A C K
Write data
A C K
Stop
PT0205(02/07) 17
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
2) Read via I2C bus a) Standard read
S 1
Start
Slave address (7 bits) 1 0 1 0 0 0
write
A
Addr. setting
A
0
A C K
Slave address + write specification
Address Specifies the read start address.
A C K
Sr 1
Restart
Slave address (7 bits) 1 0 1 0 0 0
Read
A
bit
bit
bit
bit
bit
bit
bit
bit
1
A C K
7
6
5
4
3
2
1
0
A
bit
bit
bit
bit
bit
bit
bit
bit
7
6
5
4
3
2
1
0
/A
P
Slave address + read specification
Data read (1) Data is read from the specified start address and address auto increment.
A C K
Data read (2) Address auto increment to set the address for the next data to be read.
N O A C K
Stop
b)
Simplified read
S 1
Start
Slave address (7 bits) 1 0 1 0 0 0
Read
A
bit
bit
bit
bit
bit
bit
bit
bit
1
A C K
7
6
5
4
3
2
1
0
A
bit
bit
bit
bit
bit
bit
bit
bit
7
6
5
4
3
2
1
0
/A
P
Slave address + read specification
Data read (1) Data is read from the address pointed by the internal address register and address auto increment.
A C K
Data read (2) Address register auto increment to set the address for the next data to be read.
N O A C K
Stop
Note: 1. The above steps are an example of transfers of one or two bytes only. There is no limit to the number of bytes transferred during actual communications. 2. 49H, 4AH are used as test mode address. Customer should not use the addresses.
PT0205(02/07) 18
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Maximum Ratings
Storage Temperature...................................................................................................................-65oCto +150oC Ambient Temperature with Power Applied.........................................................................-40oCto +85oC Supply Voltage to Ground Potential (Vcc to GND) ........................................................-0.3V to +6.5V DC Input (All Other Inputs except Vcc & GND).............................................................-0.3V to (Vcc+0.3V) DC Output Voltage (SDA, /INTA, /INTB pins).................................................................-0.3V to +6.5V DC Output Current (FOUT).....................................................................................................-0.3V to (Vcc+0.3V) Power Dissipation.........................................................................................................................320mW (depend on package)
Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Recommended Operating Conditions
Part No. Symbol VCC VOSC PT7C4337 VIH VIL TA Power voltage Oscillator voltage Input high level Input low level Operating temperature SCL, SDA INTA, SQW/INTB -0.3 -40 Description Min 1.8 1.3 0.7VCC Type Max 5.5 5.5 VCC+0.3 5.5 0.3VCC 85 C V Unit
PT0205(02/07) 19
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
DC Electrical Characteristics
Unless otherwise specified, VCC = 1.8~5.5V, TA = -40 C to +85 C
Sym.
Item
Pin
VCC VCC VCC VCC VCC VCC SCL SCL X1 X1 SDA, /INTA, /INTB SCL SDA, /INTA, /INTB
Condition
Min
1.8 1.3
Typ
Max
Unit
VCC Supply voltage VOSC Oscillator voltage Active supply current Standby current ICC Timekeeping current Data retention current VIL1 Low-level input voltage VIH1 High-level input voltage VIL2 Low-level input voltage VIH2 High-level input voltage IOL Low-level output current IIL Input leakage current IOZ Output current when OFF
/ETIME bit = 0, Note 1 /ETIME bit = 1, Note 2,3 VCC: 1.3~1.8V, Note 2,4,5 VCC: 1.3~1.8V, Note 2 -0.3 0.7VCC 0.53 0.53 VOL = 0.4V
5.5 V 5.5 V 150 A 1.5 600 nA 50 0.3VCC V VCC+0.3 V 3 1 1 mA A A
Note: 1. SCL clocking at max frequency = 400kHz, VIL = 0.0V, VIH = VCC. 2. Specified with 2-wire bus inactive, VIL = 0.0V, VIH = VCC. 3. SQW enabled. 4. Specified with the SQW function disabled by setting INTCN = 1. 5. Using recommended crystal on X1 and X2.
PT0205(02/07) 20
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
AC Electrical Characteristics
Sym VHM VHL Description Rising and falling threshold voltage high Rising and falling threshold voltage low Value 0.8 VCC 0.2 VCC Unit V V
Signal VHM VLM
tf
tr
Over the operating range Symbol fSCL tSU;STA tHD;STA tSU;DAT tHD;DAT1 tHD;DAT2 tSU;STO tBUF tLOW tHIGH tr tf tSP* CB SCL clock frequency START condition set-up time START condition hold time Data set-up time (RTC read/write) Data hold time (RTC write) Data hold time (RTC read) STOP condition setup time Bus idle time between a START and STOP condition When SCL = "L" When SCL = "H" Rise time for SCL and SDA Fall time for SCL and SDA Allowable spike time on bus Capacitance load for each bus line Item Min. 0.6 0.6 200 35 0 0.6 1.3 1.3 0.6 0.3 0.3 50 400 Typ. Max. 400 Unit kHz s s ns ns s s s s s s s ns pF
* Note: only reference for design
tSU;STA
S SCL tLOW fSCL tSU;DAT tHIGH
Sr tHD;STA tSP
P
tBUF tSU;STO tHD;STA
SDA tHD;STA tHD;DAT tSU;STA
S Sr
Start condition Restart condition
P
Stop condition
PT0205(02/07) 21
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Mechanical Information
PE (Lead free DIP-8)
8 .240 .280 6.09 7.11
1
.355 .400 9.01 10.16
7.62 8.25 .300 .325 .210 Max 5.33 SEATING PLANE .008 .014 0.20 0.35 .015 Min 0.381
X.XX X.XX Note: 1) Controlling dimensions in inches. 2) Ref: JEDEC MS-001 BA
0O 15o
.115 .150 2.921 3.81
.430 Max 10.92
.100 typical 2.54
.014 .022
.356 .558
DENOTES DIMENSIONS IN MILLIMETERS
PT0205(02/07) 22
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
WE (Lead free SOIC-8)
8
.149 3.78 .157 3.99 .0099 0.25 x 45o .0196 0.50 0-8o 0.40 .016 1.27 .050 .2284 .2440 5.80 6.20 .0075 0.19 .0098 0.25
1 .189 4.80 .196 5.00
.016 .026 0.406 0.660 REF .050 BSC 1.27
.053 1.35 .068 1.75 SEATING PLANE
.0040 0.10 .0098 0.25 .013 0.330 .020 0.508
X.XX X.XX
DENOTES DIMENSIONS IN MILLIMETERS
Note: 1) Controlling dimensions in millimeters. 2) Ref: JEDEC MS-012 AA
PT0205(02/07) 23
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
UE(Lead free MSOP-8)
Symbol A A1 A2 b c D e E E1 L
Dimensions in Millimeters Min Max 0.820 1.100 0.020 0.150 0.750 0.950 0.250 0.380 0.090 0.230 2.900 3.100 0.650(BSC) 2.900 3.100 4.750 5.050 0.400 0.800 0 6
Dimensions in Inches Min Max 0.032 0.043 0.001 0.006 0.030 0.037 0.010 0.015 0.004 0.009 0.114 0.122 0.026(BSC) 0.114 0.122 0.187 0.199 0.016 0.031 0 6
PT0205(02/07) 24
Ver: 1
Data Sheet PT7C4337 Real-time Clock Module (I2C Bus)
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Notes
Pericom Technology Inc.
Email: support@pti.com.cnWeb Site: www.pti.com.cn, www.pti-ic.com China: No. 20 Building, 3/F, 481 Guiping Road, Shanghai, 200233, China Tel: (86)-21-6485 0576 Fax: (86)-21-6485 2181 Unit 1517, 15/F, Chevalier Commercial Centre, 8 Wang Hoi Rd, Kowloon Bay, Hongkong Tel: (852)-2243 3660 Fax: (852)- 2243 3667 3545 North First Street, San Jose, California 95134, USA Tel: (1)-408-435 0800 Fax: (1)-408-435 1100
Asia Pacific:
U.S.A.:
Pericom Technology Incorporation reserves the right to make changes to its products or specifications at any time, without notice, in order to improve design or performance and to supply the best possible product. Pericom Technology does not assume any responsibility for use of any circuitry described other than the circuitry embodied in Pericom Technology product. The company makes no representations that circuitry described herein is free from patent infringement or other rights, of Pericom Technology Incorporation.
PT0205(02/07) 25
Ver: 1

▲Up To Search▲

Price & Availability of PT7C4337

	To Download PT7C4337 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .